AMD’s new Zen 4 CPUs for Socket AM5 – Raphael’s temperature and power management explained in detail | Exclusive

AMD's new Zen 4 CPUs for Socket AM5 - Raphael's temperature and power management explained in detail |  Exclusive

AMD’s new Zen 4 CPUs for Socket AM5 – Raphael’s temperature and power management explained in detail | Exclusive

First of all, I can reassure everyone that, in contrast to the current Zen3 generation, not much will change with Zen4 either. However, even now there are still a lot of vague hypotheses and uncertainties about AMD’s reading of monitoring the temperatures and also displaying them for the user. Today I would like to shed some light on the upcoming CPUs. Unfortunately, terms like Tctl are often misinterpreted and misunderstood. And when it comes to temperature and power management, all that’s left is dark forest. But don’t worry, I’ll break it all down as easily as possible.

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The Tctl and Tcase demystified

In order to understand the value for Tctl correctly, one has to take a closer look at the origin and purpose of this temperature data. With the Socket AM5 processors, this so-called on-die temperature monitoring is implemented either via the sideband temperature sensor interface (SB-TSI) according to the SMBus v2.0 specification or by reading the register for THM_TCON_CUR_TMP, which is the same for both methods amounts to and would only confuse here as a more precise explanation. SB-TSI is therefore largely identical to the interfaces of common thermal diode monitoring devices and, as usual, can also be read out quite easily.

The reported value Tcontrol (Tctl for short) is made available to the platform for controlling the cooling solution, but does not represent the actual temperature of the chip or the processor housing! The maximum value of Tcontrol is always fixed and unalterably standardized to 100 for all processors, regardless of the maximum case temperature Tcase of the processor.

Before we go into Tcase as a (TDP class-dependent) case temperature, we are interested in Tjunction (Tj for short) as the junction temperature. As with Zen 3 (and older), the customer can determine the actual junction temperature using the well-known formula Tj = Tctl + Tj, offset. Interestingly, the documents for Zen 4 only contain the value 0 as the offset for all TDP classes, so that either nothing has been entered in the specs or no offset is used here. Then one could even assume that Tj and Tctl are identical, whereby I personally assume a higher value, but which is not disclosed in order not to frighten the end user.

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Tctl should always be used to control the fan speed to keep the processor within its temperature specification and can also be used by the system to throttle the processor. The processor also has a fast ALERT_L pin to use an interrupt-driven model instead of the slower polling. The usual calculation with Tctl – Tctl, max (such as in HWinfo64) ultimately only states by how many degrees Celsius a processor is below the maximum temperature (100).

However, what has been further improved at Raphael is CUR_TEMP. This filter function smooths the reported temperature and helps avoid nervous changes in fan speed in response to reported spikes. We know the seemingly random, sudden howl of the CPU fan, especially from older Intel mainboards, where the annoying ups and downs until the circumstances were corrected met with harsh criticism. Here the values ​​for Tctl are actually cut and decelerated.

With Tcase as a guideline, that’s a thing, because depending on the TDP class, Raphael uses a different value that fits the required cooling solution. This also refers to the sum of the thermal resistances between the IHS (processor cover) and the environment. What all values ​​have in common, however, is the reference point in the middle of the surface of the IHS. The targeted values ​​themselves are shown in the table for Tcase:

The thermal management

In addition to these readout values ​​for fan control and temperature control, there are other thermal functions. The most important are the configurable hardware heat control (cHTC), PROCHOT and ThermTrip. This is extremely interesting because they are things that only take place inside the processor and cannot be influenced from the outside and are immediately visible. One such feature is Configurable Hardware Thermal Control (cHTC), which provides smooth p-state transitions to maximize performance during actual operation. The standard Tctl limit for cHTC is set to 95. This is a specially secured value and it cannot be changed by the BIOS. The end user should therefore adjust the fan speed so that the processor then operates at maximum or even better below the Tctl limit value under full load, because otherwise the leeway for the clock rate can no longer be used (thermal throttling).

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PROCHOT has been around since Intel’s Pentium 4 processors and the digital output pin shows that the internal thermal control circuit has been activated. This happens when the processor has reached its maximum safe operating temperature. The SoC frequency will continue to be determined by the PL4 for the upcoming Alder Lake and Raptor Lake CPUs. Not so with AMD. In contrast to Intel, PROCHOT_L is a real unidirectional pin, where only the system can trigger PROCHOT and put the processor into the active PROCHOT state.

In this state the processor initiates a transition to the lowest frequency (Fmin). This value is also fixed and cannot be changed. The power reduction is achieved within 1.5 ms after switching on. PROCHOT can only be triggered every 5 ms by an external agent (for an unlimited period). Intel’s Fast PROCHOT # is significantly faster here. Vsys1 is monitored by the IMPV9.1 controller and PROCHOT is activated within 2 μs (adjustable) after the threshold has been exceeded. The CPU is then throttled 1μs later. Fast PROCHOT # enables Intel to have a higher PL4, which leads to better responsiveness down to low states of charge, while maintaining system stability, but also generating harder load changes.

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And then there is the Thermtrip_L pin for final protection (shutdown). This is activated by the processor itself when the processor temperature exceeds a preset limit value. The processor clocks are switched off and a low-voltage VID code is sent to the voltage regulator. In such a case, the system should switch to the system shutdown state (S5) within 500 ms. The Thermtrip_L pin is bidirectional and either the system or the processor can trigger the Thermtrip function by setting the Thermtrip_L pin to low. Thermtrip_L is used as protection to prevent permanent hardware damage. The same on-die temperature detection mechanism is used for SB-TSI, cHTC and ThermTrip, as I already described above as Tctl.

There are no more secrets here and the changes compared to Zen 3 are more of a minor evolution, but the actual basic principle remains the same. So you can draw conclusions about Zen 3 from many things. It is interesting, by the way, that AMD internally calls the 16-core APU, which has a graphics unit in the I / O die. But we come to power management on the next page, because the waste heat and the resulting temperatures have to come from somewhere.


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