New drivers and add-ons in the Linux kernel are a rich source of hints about what’s to come regarding new processors and graphics cards. The addition of Linux is the basis for a new report on features in Intel’s upcoming graphics architectures in the Xe family. The function in question applies to the architectures’ display unit, which is to allow the graphics circuit and the processor to work together more efficiently.
The Linux-focused site Phoronix has dug into new versions of the Linux kernel and discovered references to descriptions of Intel’s upcoming graphics architectures that are part of the Xe family. The code in the new additions describes a novelty in the architectures or display unit that is responsible for sending out the images the graphics circuit has processed. The image unit also communicates with the processor about the processed images.
The new feature in the Xe architectures is described as a hardware feature called Display State Buffer (DSB) that will improve performance in specific scenarios. More specifically, it is about reducing the time spent retrieving image information, as well as reducing the processor’s work effort when communicating with the monitor.
It helps to reduce loading time and CPU activity, thereby making the context switch faster.
According to the report, the DSB unit must only be activated when the graphics circuit’s tasks require it, and the rest of the time it must be inactive. Such a feature is likely to be extra important when used in the integrated graphics of laptops, where a relieved processor allows for extended battery life.
According to reports, the graphics architectures in the Xe family will be divided into architectures for client units and data centers. The architectures for client devices are in turn divided into graphics circuits for low-energy products (LP) and high-performance products (HP). The first wave of Xe-based graphics chips is expected to arrive with Tiger Lake laptop processors by 2020.
The first dedicated graphics cards in the Xe family will be based on the Arctic Sound architecture. According to the Twitter profile KOMACHI_ENSAKA this will be based on a so-called MCP package with two to four layers of circuits stacked according to Intel’s EMIB technology. According to the report, the Arctic Sound circuits will come in configurations of 128, 256 and 512 calculation units, so-called Execution Engines (EUs).
This means that the EMIB packaging can connect one to four circuits with 128 EU units each. By comparison, the graphics circuits in Intel’s Ice Lake family of portable processors have 64 computing units. The list of Xe-based variants also includes something called DG2, which can be data center graphics circuits.
The Tiger Lake processors with integrated Xe / Gen12 graphics are expected to be launched in 2020, while the first dedicated graphics cards with the Arctic Sound architecture will be launched at an as yet unknown date in 2020.