PCIe 6.0 standard almost finalized. Up to eight times more efficient than PCIe 3.0

It was the PCIe 6.0 specification that reached Final Draft status, which formally marks the end of development work on this new standard. It is therefore certain that the system-on-chip for PCIe 6.0 version 0.9 will be compatible with the final technology version 1.0. In other words, companies that already have 0.9 PCIe 6.0 compliant solutions can now officially sell them as “PCIe 6.0 Ready”.

PCI-SIG announced that the PCIe 6.0 standard is now in version 9.0

As expected, the PCIe 6.0 standard will increase the data transfer speed to 64 GT / s per pin, which in the case of the currently most common PCIe 3.0 standard is only 8 GT / s. Of course, the PCIe 4.0 and PCIe 5.0 that are already sneaking into the market, which is already around the corner, thanks to Intel Alder Lake processors, have a larger transfer rate, respectively 16 and 32 GT / s.

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What are we going to do with the speeds of this sort and how will they be implemented in motherboards to avoid interference between devices and buses? The answer to this question will probably bring the future, but don’t worry – this standard will remain backwards compatible with existing equipment.

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Thanks to PCIe 6.0, the x16 interface, which we mainly use to connect graphics cards, would enable data transfer up to 128 GB / s in both directions. So this is clearly a level that is very, very distant in consumer applications, but in professional ones it will certainly be properly used.

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This is where PCIe 6.0 will mainly function and it is no wonder, looking at the need for PAM-4 and FEC error correction, as well as the production requirement of very, very advanced laminates that will be able to handle such transfers.