The AMD X670 chipset would use a double-die design based on two B650 chipsets

The AMD X670 chipset would use a double-die design based on two B650 chipsets

The implementation of multiple DIEs in AMD CPUs was a success, and the company is planning to diversify it to other product lines, including its GPUs with the RDNA3-based RX 7000 line, and apparently also its chipsets, with the arrival of the chipset. X670.

According to the latest leaked information, AMD is planning for the X670 chipset to use two B650 DIEs, avoiding redesigning another separate chipset DIE as always, resulting in the first multi-DIE chipset on the market. This is something that is already generating concern in motherboard manufacturers, since the packaging could be too large and complicate the design of ITX motherboards, where every millimeter counts due to having such a small space to place the components. In this way we could only be limited to using B650 on ITX boards, or manufacturers will have to sacrifice expansion options in order to fit the chipset on the PCB.

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What else is known about X670 motherboards

As revealed by AMD, this next platform will use the AM5 socket, and will support DDR5 and PCI-Express 5.0 memory, putting it on a par with Intel in terms of I / O. The first processors to come to this platform will be the Zen 4-based Raphael CPUs, which is still unclear if they will be called Ryzen 6000 or Ryzen 7000. These will have up to 16 cores and 32 threads, TDP of up to 170W, and will be manufactured under TSMC’s 5nm, offering a performance increase of up to 20% over Zen3D-based Ryzen.

This AM5 platform is expected to arrive in the second half of 2022, although exactly when is unclear. Some rumors indicate that it will arrive in July, although others indicate that we will have to wait until the last quarter, between the end of October and the beginning of November, so it is not yet clear when we will see these new products.

What do you think about this rumor about the X670 chipset? Do you think it is a good option to implement a multi-DIE design on a chipset?

Source: TechPowerUp

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