Categories: Graphic cards

Nvidia researchers propose several graphics circuits in MCM solution for higher performance

Manufacturing advances are taking longer and longer, something that became apparent to both AMD and Nvidia that for more than 4 years stood still at 28 nanometers. This meant that the companies had to put extra focus on improved architectures and make larger, more expensive circuits to get more performance.

In May, Nvidia announced the architecture Volta and the graphics circuit GV100, which with its 815 mm2 is the greatest of all time. This is also the limit for how large a circuit can be made, which is why the industry has started to look at alternative ways to make room for more transistors and get more performance. In early June, Nvidia’s CEO also announced that “Moore’s team is dead”.

Now researchers and engineers at Arizona State University, Nvidia, the University of Texas at Austin and the Barcelona Supercomputing Center are proposing something they call MCM-GPU – Multi-Chip Module GPU. The concept is reminiscent of AMD’s new server processors in the Epyc family, where four 8-core circuits are housed on the same substrate to create models with up to 32 cores.

In addition to the difficulties of even manufacturing larger circuits, it is difficult to get good yield, the number of operating circuits after manufacture. According to the proposal, Nvidia could produce four smaller circuits and assemble them, instead of producing a huge monolithic similar to the GV100.

The solution is not comparable to Nvidia SLI, where the bandwidth between graphics circuits often limits the performance scaling in different workloads. According to the research team, recent developments have made it possible in the long run to connect several graphics circuits on a substrate, where the bandwidth between these is calculated in several terabytes per second.

It is not clear when a solution like this from Nvidia could become a reality. It is worth mentioning that Intel has previously talked about similar solutions on the processor side, where AMD has already embraced this with the Infinity Fabric interface in Epyc.

Source: Techreport

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