Intel wants 1.4-nanometer CPU in 2029. Here's the way to get there

What production process will Intel's CPUs be made in 2029? 1.4 nanometers, according to a slide shown by ASML, the Dutch manufacturer of lithographic machinery, during the IEEE International Electron Devices Meeting (IEDM) conference.

ASML presented for the occasion an altered version of an official Intel slide, replacing the dates indicated by the company at the bottom with specific production processes. For this reason you see both slides in the article.

According to what reported by some US media (eg Anandtech), what is indicated in the modified slide remains relevant and therefore representative of the future intentions of the house of Santa Clara. As you can see, and as already indicated by Intel in the past, the goal is advance of production process every 2 yearsstarting from the 10 nanometers that the company has actually adopted this year with the Ice Lake mobile CPUs.

On the other hand, the slide clearly says “In Moore we trust“, Ie Intel wants to continue to respect the so-called Moore's law (” The number of transistors doubles every 18/24 months “, with various other variations and / or distortions).

In 2021 here is the jump to 7 nanometers (with the introduction of EUV lithography – extreme ultraviolet), then move on to 5 nanometers in 2023, 3 nanometers in 2025, 2 nanometers in 2027 and 1.4 nanometers in 2029. The latter is equivalent to a size of 12 atoms.

As Anandtech points out, however much an extreme miniaturization is being talked about, the industry has been discussing even smaller dimensions for some time, for example at the IEDM the topic of 0.3 nanometers was touched with self-assembling 2D materials, and obviously there are many obstacles on the path of Intel and its partners.

To meet market demands and create a useful lifeboat in case of any problems in the progress of the production process – think about what is happening with the 14 nanometers – Intel will create two improved versions of each process.

With the exception of the 10 nanometers, which are already indicated as 10+ and which will be followed by versions 10 ++ (2020) and 10 +++ (2021), we will see a basic process, followed by an improved version the following year (+) and a further refined after two years (++). The slide shows a rather interesting wording, “backporting opportunity”, Which needs to be explained.

This is not something new, in fact it simply means that if a chip is designed for a given production process (for example the 5 nanometers) but problems are encountered, it is possible to achieve it with the “++” version of the previous process (in the example, the 7 nanometers “++”).

Intel has said for some time that the goal is to cutting the umbilical cord that has hitherto indissolubly linked the various projects to specific production processes. Will Intel be able to keep pace and its goals? Only time will tell, but it is useful to remember that there is not a single team that develops all the processes, so think of different groups of people who work in parallel to fix the characteristics and everything it takes to produce with a certain process.

The slide indicates that Intel is currently developing the optimizations of the 10 +++ process and working on 7 nanometers and its declinations. Another information that emerges is that the 7 nanometers are based on the 10 ++, while the 5 nanometers will evolve starting from the 7 nanometers and so on, although it is plausible that some of the optimizations of the “+” and “++” processes will end also in the main production processes.

As for the processes starting from 2023, Intel is currently in “path finding” mode, that is, it is looking for a path, that is, trying to understand concretely what it needs to get to that type of miniaturization. Besides we talk about “research”, research, with the company that studies new materials, transistor design (gate-all-around, nano-sheet, nano-wire, etc.) and anything could be applied to those processes.