AMD patents reveal details about chiplet-based graphics circuits

Chiplet technology is nothing new in the processor turn and has in recent years been a snack bar with AMD’s Ryzen processors. In short, the technology means that the traditional monolithic circuit is replaced by several smaller ones, which provides advantages such as scalability, the use of different manufacturing nodes for different needs and that the obstacle of manufacturing large circuits is avoided.

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So far, chiplet design has not been used for graphics circuits, but future solutions from AMD may do so according to two patents, the most recent of which is dated to the first of April in 2021. The first patent from January specified a passive bridge between chiplets in a graphics circuit design.

The latest patent instead describes an active bridge that acts crossbar with shared L3 cache, similar to monolithic cache solutions in processors. The fact that the bridge is active means that it can control the communication between different chiplet circuits and actively decide whether, for example, a memory request should be directed to the common L3 cache or L2 cache dedicated to one circuit.

A method, comprising: receiving, at a first GPU chiplet of a GPU chiplet array, a memory access request from a central processing unit (CPU); determining, at an active bridge chiplet controller of the first GPU chiplet, that data associated with the memory access request is cached at an active bridge chiplet shared by the first GPU chiplet and a second GPU chiplet of the GPU chiplet array; routing the memory access request to a unified last level cache at the active bridge chiplet; and returning data associated with the memory access request to the CPU.

The patent does not specify whether the design with an active bridge is intended for AMD’s computing platforms or whether it will also take place in game-oriented circuits. However, previous rumors have it that the game-oriented architecture RDNA 3 will be a chiplet design.

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