Many consumers are still figuring out the difference between PCIe 3.0 and PCIe 4.0, and PCIe 5.0 SSDs are only just beginning to hit the market, with the PCI-SIG consortium releasing specifications for PCIe 6.0 this week.
The PCI-SIG consortium finally released the full 1.0 specifications for PCIe 6.0 this week after going through various drafts over the previous years.
The PCIe 6.0 specification will be backwards compatible. The main benefit is that it doubles the data rate to 64 GT/s and doubles the maximum bandwidth to 256 GB/s using 16 lanes compared to 128GB/s for PCIe 5.0. Other new features include four-level Pulse Amplitude Modulation (PAM4), Forward Error Correction (FEC), Cyclic Redundancy Check (CRC), and Flow Control Units (Flits).
According to the PCI-SIG FAQ, it is PAM4 that allows the specification to achieve such high bandwidth. It modulates signals at four levels, packing two bits of information into a serial channel in the same amount of time.
However, higher bandwidth leads to higher bit error rate, which FEC and CRC should help correct.
The latest components in most consumer PCs right now, like graphics cards and SSDs, are still transitioning from PCIe 3.0 to 4.0, with some companies starting to ship their first 5.0 SSDs. PCI-SIG says that 6.0 will initially focus on data centers along with industrial, automotive, military and aerospace applications. It probably won’t reach everyday consumers for a while.